1. Field of the Invention
The present invention relates to a stereo decoder and method for processing a pilot signal; more specifically, relates to a stereo decoder and method for processing pilot signal with an auto-calibration circuit.
2. Descriptions of the Related Art
For pilot detectors of the prior art, there is an FM demodulator used to demodulate a received signal to generate a multiplexed (MPX) signal which carries a pilot signal and an audio signal. The MPX signal's spectrum shows in FIG. 1. The MPX signal comprises a bandwidth of a summation of a left sound signal and aright sound signal (L+R) 100, the pilot signal 102, two bandwidths of subtraction of the left sound signal and the right sound signal (L−R) 104, 106, and a radio data system signal (RDS) 108. The pilot signal 102 for identifying that the audio signal is a mono signal or a stereo signal is modulated at a certain frequency. As FIG. 2 shows, a stereo decoder 2 of the prior art comprises a pilot signal processor 21, a de-emphasis filter 23. The pilot signal processor 21 is configured to retrieve a pilot signal out from a MPX signal. More particularly, the pilot signal processor 21 comprises a band-pass filter 201 with a center frequency of 19 kHz to filter the MPX signal so that the pilot signal can be retrieved. The pilot signal processor 21 further comprises a phase-locked loop (PLL) circuit 203 for synchronously processing the pilot signal to detect phase difference between the pilot signal and a reference signal. The de-emphasis filter 23 is configured to de-emphasize an audio signal, which is retrieved from the MPX signal, to generate a de-emphasis signal. The de-emphasis signal is a signal being low-passed by a first order low-pass filter of which the 3-dB frequency is around, for example, 2.122 KHz (US standard) or 3.183 KHz (Japan/Euro standard).
Both of the band-pass filter 201 and the PLL circuit 203 require passive components, e.g. networks 205 and 207, to set the center frequency of bandpass filter 201 and the loop bandwidth of PLL 203. The de-emphasis filter 23 also requires a filter capacitor, e.g. a network 209. These networks 205, 207, 209 are implanted on a printed circuit board and connected to the chip of the stereo decoder 2. In other words, the networks 205, 207, 209 are not integrated in the chip of the stereo decoder 2. Such external components occupy too much space and increase cost.
Accordingly, a solution of integrating a pilot detector and filter capacitors/resistors is desired in the industrial field.